Jitter at the digital to analogue domain boundary
The task of a digital to analogue (or analogue to digital) converter is twofold: conversion of discrete symbolic data (binary code) to continuous real data (electrical current or voltage) and the conversion of abstract-time to real-world time, basically some kind of synchronisation.
Incorporated in Anagram’s patented Q5 Upsampling is a form of synchronisation called DSS™ (Data to System Synchronisation). Instead of adapting the system’s operating frequency to the incoming time base or to use a RAM buffer or an SRC chip, DSS™ uses a software based upsampler (sample rate converter) based on their Q5™ SRC kernel to perform abstract to real-world time conversion using a local high quality single clock.
The fact that all clocks in the system are made synchronous to this local high quality clock is one of the key aspects of DSS™. As such the DSP and all other clocked devices in the system are driven using a clock derived synchronously from this local clock source. The general idea behind DSS™ is to use a single time base and to adapt the audio data to this time base result in the extraordinary jitter rejection performance seen in the implementation of this technology. Furthermore, the complete system being synchronous, possible noise appearing in the output stage and resulting from multiple clocks interaction is reduced to a minimum.